PROCESSOR REGISTERS

 The processor contains a set of registers that provide faster and smaller memory than the main memory. It provides two functions

User-visible registers:

Enable the machine or assembly language programmer to minimize main memory references by optimizing register use. For high-level languages, an optimizing compiler will attempt to make intelligent choices of which variables to assign to registers and which to main memory locations. Some high-level languages, such as C,allow the programmer to suggest to the compiler which variables should be held in registers.

Control and status registers:

It is used by the processor to control the operation of the processor and by privileged OS routines to control the execution of the program.

    There is no clean division of registers in these two categories. For example, on some processors, the program counter is visible to the user, but for the most part it is not. For the purpose of the following discussion, however, it is convenient to use these categories

User-Visible Registers

A user visible register may be referenced by means of the machine language that the processor executes and is generally available to all programs, including application programs as well as system programs. Types of registers that are typically available are data, address and condition code registers.

    Data registers:    

            Can be assigned to the variety of functions by the programmer. In some cases they are general purpose in nature and can be used with any machine instruction that performs operations on data. Often, however, there are restrictions. For example, there may be dedicated registers for floating-point operations and others for integer operations.

    Address registers:

            It contain main memory address of data and instructions, or they contain portion of address that is used in the calculation of the complete or effective address. These registers may themselves be general purpose, or may be devoted to a particular way, or mode, of addressing memory. Examples include the following:

• Index register:

           Indexed addressing is a common mode of addressing that involves adding an index to a base value to get the effective address.

• Segment pointer:

            With segmented addressing, memory is divided into segments, which are variable-length blocks of words. A memory reference consists of a reference to a particular segment and an offset within the segment; this mode of addressing is important in our discussion of memory management. In this mode of addressing, a register is used to hold the base address of the segment. There may be multiple registers; for example, one for the OS i.e., when OS code is executing on the processor and one for the currently executing applications 

• Stack pointer:

            If there is user-visible stack addressing, then there is a dedicated register that points to the top of the stack. This allows the use of instructions that contain no address field, such as push and pop.

            For some processor, a procedure call will result in automatic saving of all user-visible registers, to be restored on return. Saving and restoring is performed by the processor as part of the execution of the execution of the call and return instruction. This allows each procedure to use these registers  independently. On other processor, the programmer must save the contents of the relevant user-visible registers prior to a procedure call, by including instructions for this purpose in the program. Thus, the saving and restoring functions may be performed in either hardware or software, depending on the processor.

Control and Status Registers

A variety of processor registers are employed to control the operation of the processor. On most processors, most of these are not visible to the user. Some of them may be accessible by machine instructions executed in what is referred to as a control or kernel mode.

    Of course, different processors will have different register organizations and use different terminology. We provide here a reasonably complete list of register types, with a brief description. In addition to the MAR, MBR, I/OAR, and I/OBR registers mentioned earlier figure, the following are essential to instruction execution:

• Program counter(PC):

            Contains the address of the next instruction to be fetched.

• Instruction registers(IR):

            Contains the instruction most recently fetched 

All processor designs also include a register or set of registers, often known as the program status word (PSW), that contains status information. The PSW typically contains condition codes plus other status information, such as an interrupt enable/disable bit and a kernel/user mode bit.

    Condition codes 

    These are bits typically typically set by the processor hardware as the result of operations. For example, an arithmetic may produce a positive, negative,zero, or overflow result. In addition to the result itself being stored in a register or memory, a condition code is also set following the execution of the arithmetic instruction. The condition code may subsequently be tested as part of conditional branch operation. Condition code bits are collected into one or more registers. Usually, they form a part of a control register. Generally, machine instructions allow these bits to be read by implicit reference, but they cannot be altered by explicit reference because they are intended for feedback regarding the results of instruction execution.

      In processors with multiple types of interrupts, a set of interrupts registers may be provided with one pointer to each interrupt- handling routine. If a stack is used to implement certain functions then a stack pointer is needed. Finally registers may be used in the control of I/O operations.

       A number of factors go into the designs of the control and status register organization. One key issue is OS support. certain types of control information are of specific utility to the OS. If the processor designer has a functional understanding of the os to be used, then the register organization can be designed to provide hardware support for particular features such as memory protection and switching between user programs.

        Another key design decision is the allocation of control information between registers and memory. It is common to dedicate the first few hundred or thousand words of memory for control purposes. The designer must decide how much control information should be in more expensive, faster registers and how much in less expensive, slower main memory.

Read also basic elements of computer